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Indian Institute of Technology Madras (IIT Madras) is collaborating with the Union Ministry of Electronics and Information Technology (MeitY), RISC-V International and industry leaders, to host the Second Digital India RISC-V (DIR-V) Symposium on 2nd and 3rd March 2025 at the IIT Madras Research Park.
The DIR-V Symposium 2025 is a crucial platform for defining India’s self-reliance in semiconductor technology, aligning with national initiatives such as ‘Digital India’, ‘Make in India’ and the ‘India Semiconductor Mission.’
This premier event is bringing together global and Indian experts, policymakers, start-ups, academia and industry pioneers to discuss the latest advancements in RISC-V-based processor design, open-source hardware innovations and India's semiconductor roadmap.
RISC-V International is a non-profit of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community. With global membership across 70 different countries, over 4,200 members are contributing and collaborating to define RISC-V open specifications as well as convene and govern related technical, industry, domain, and special interest groups.
Introducing the Chief Guest and Former Union Minister of State Shri Rajeev Chandrasekhar, Prof. V. Kamakoti, Director, IIT Madras, said, “He is the man behind DIR-V. He coined the word ‘Digital India RISC-V’ and was kind enough to make a National announcement. India now has a National Instruction Set Architecture (ISA), which we owe to Shri Rajeev Chandrasekhar.”
Delivering the Chief Guest Address, Shri Rajeev Chandrasekhar, former Union Minister of State for Electronics and Information Technology, said, “This is certainly the most exciting period in the history of technology. The opportunities today are tremendous in terms of almost re-scripting the landscape of technology as we knew it all these years. This is certainly one of the greatest inflection points that we today live in. Indian entrepreneurs, brands and companies have traditionally lagged, for almost 25 years, in the areas of semiconductors and electronics. We had no notable architecture, systems, solution, component or device that we have done over the last two-and-a-half decades. Effectively, we were an innovation economy that worked off of architectures, platforms and systems that were designed and built elsewhere and we created software stacks and layers of applications around that. And that is what constituted our innovation economy for over two decades.”
Shri Rajeev Chandrasekhar added, “Today, in almost every aspect of that technology ecosystem - whether it is the component, the device, the systems, segments of the economy that are embracing electronics and digital technologies or the software stacks that sit on all of it - all of this is getting ‘re-architectured’ and re-done. Today, we have the opportunity to being a significant player in scripting the future of device, systems and the operating software and software stack on it going forward because all of this is getting re-done and re-architectured. The technology cycles that we have seen in the past are repeating themselves, albeit at a shorter timeframe.”
Further, Shri Rajeev Chandrasekhar added, “We are almost at the starting stage of the next wave of what would be the future of technology and the future of compute. That is is where India can play a very significant role including with the RISC-ISA and the DIR-V program. When DIR-V was launched, there was a desire on part of the Hon’ble Prime Minister Shri Narendra Modi that India move from being completely absent in semiconductors to having a presence both in the design and innovation side of the chips as well as manufacturing and packaging innovation.”
Shri Rajeev Chandrasekhar emphasised, “Now, we have moved from being a complete absentee in the semiconductor landscape to now, today, slowly and systematically planting our flags and building our presence. I have absolutely no doubt that by the year 2026-27, we will have our first 28 nm fab in Gujarat. We will have multiple entities doing packaging and innovation in India and along with that I am hopeful DIR-V ecosystem will continue to expand and grow out of lab and proof of concepts into creating real commercial success and applications where DIR-V and RISC-V systems are embedded. This is the dream, this is the hope and this is something that is certainly achievable.”
Addressing the symposium earlier, Prof. V. Kamakoti added, “RISC-V, being an open-source, extensible domain specific Instruction Set Architecture (ISA), has a great promise for us to design novel normative architectures and make it available to the startup industry who can in turn, customize them and make very efficient and effective domain specific SoCs (System-on-Chips).”
Further, Prof. V. Kamakoti said, “This symposium will bring together the designers, the chip architects, the product OEMs and also application OEMs on a single platform. Being the brain of every deployed electronic system, it is extremely crucial for the entire micro-processor based ecosystem to develop in our country.”